• =?UTF-8?B?VGhvbWFzIEvDvGhuZQ==?= (33/33) Oct 03 2005 -----BEGIN PGP SIGNED MESSAGE-----

=?UTF-8?B?VGhvbWFzIEvDvGhuZQ==?= <thomas-dloop kuehne.cn> writes:

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Intel's IA-32 manual lists 8 aliases for CMPSD
(compare scalar double-precision floating-point values)
and CMPSS (compare scalar single-precision floating-point values)
that improve readability and grep-ability by replacing the
third parameter(comparison predicate) with a pseudo-ops.

CMPEQSD xmm1, xmm2        ->        CMPSD xmm1, xmm2, 0
CMPLTSD xmm1, xmm2        ->        CMPSD xmm1, xmm2, 1
CMPLESD xmm1, xmm2        ->        CMPSD xmm1, xmm2, 2
CMPUNORDSD xmm1, xmm2     ->        CMPSD xmm1, xmm2, 3
CMPNEQSD xmm1, xmm2       ->        CMPSD xmm1, xmm2, 4
CMPNLTSD xmm1, xmm2       ->        CMPSD xmm1, xmm2, 5
CMPNLESD xmm1, xmm2       ->        CMPSD xmm1, xmm2, 6
CMPORDSD xmm1, xmm2       ->        CMPSD xmm1, xmm2, 7

CMPEQSS xmm1, xmm2        ->        CMPSS xmm1, xmm2, 0
CMPLTSS xmm1, xmm2        ->        CMPSS xmm1, xmm2, 1
CMPLESS xmm1, xmm2        ->        CMPSS xmm1, xmm2, 2
CMPUNORDSS xmm1, xmm2     ->        CMPSS xmm1, xmm2, 3
CMPNEQSS xmm1, xmm2       ->        CMPSS xmm1, xmm2, 4
CMPNLTSS xmm1, xmm2       ->        CMPSS xmm1, xmm2, 5
CMPNLESS xmm1, xmm2       ->        CMPSS xmm1, xmm2, 6
CMPORDSS xmm1, xmm2       ->        CMPSS xmm1, xmm2, 7

source:
IA-32 Intel Architecture Software Developer¡¯s Manual
3-136 Vol. 2A (25366616.pdf)

Adding those opcodes to D's inline assembler might be helpfull.

Thomas
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