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digitalmars.D.learn - Read/Write memory barriers in D?

reply Igor <stojkovic.igor gmail.com> writes:
I am converting a C code that uses this macro:

#define CompletePastWritesBeforeFutureWrites _WriteBarrier(); 
_mm_sfence()

As far as I see core.atomic:atomicFence() is the equivalent of 
_mm_sfence() but I can't find what would be the equivalent of 
_WriteBarrier(). As far as I understand it is used just to tell 
the compiler it can't rearrange instructions during optimizations 
so subsequent memory writes happen before previous ones. Same for 
_ReadBarrier().
Aug 13 2017
next sibling parent Daniel Kozak via Digitalmars-d-learn <digitalmars-d-learn puremagic.com> writes:
maybe something like https://dlang.org/phobos/core_bitop.html#.volatileLoad
and https://dlang.org/phobos/core_bitop.html#.volatileStore

On Sun, Aug 13, 2017 at 1:37 PM, Igor via Digitalmars-d-learn <
digitalmars-d-learn puremagic.com> wrote:


 I am converting a C code that uses this macro:

 #define CompletePastWritesBeforeFutureWrites _WriteBarrier(); _mm_sfence()

 As far as I see core.atomic:atomicFence() is the equivalent of
 _mm_sfence() but I can't find what would be the equivalent of
 _WriteBarrier(). As far as I understand it is used just to tell the
 compiler it can't rearrange instructions during optimizations so subsequent
 memory writes happen before previous ones. Same for _ReadBarrier().
Aug 13 2017
prev sibling parent reply Daniel Kozak via Digitalmars-d-learn <digitalmars-d-learn puremagic.com> writes:
or maybe use core.atomic.atomicLoad and store with right
https://dlang.org/phobos/core_atomic.html#.MemoryOrder

On Sun, Aug 13, 2017 at 1:51 PM, Daniel Kozak <kozzi11 gmail.com> wrote:


 maybe something like https://dlang.org/phobos/
https://dlang.org/phobos/


 On Sun, Aug 13, 2017 at 1:37 PM, Igor via Digitalmars-d-learn <
 digitalmars-d-learn puremagic.com> wrote:


 I am converting a C code that uses this macro:

 #define CompletePastWritesBeforeFutureWrites _WriteBarrier();
 _mm_sfence()

 As far as I see core.atomic:atomicFence() is the equivalent of
 _mm_sfence() but I can't find what would be the equivalent of
 _WriteBarrier(). As far as I understand it is used just to tell the
 compiler it can't rearrange instructions during optimizations so subsequent
 memory writes happen before previous ones. Same for _ReadBarrier().
Aug 13 2017
parent Igor <stojkovic.igor gmail.com> writes:
On Sunday, 13 August 2017 at 11:58:56 UTC, Daniel Kozak wrote:

 or maybe use core.atomic.atomicLoad and store with right 
 https://dlang.org/phobos/core_atomic.html#.MemoryOrder

 On Sun, Aug 13, 2017 at 1:51 PM, Daniel Kozak 
 <kozzi11 gmail.com> wrote:


 maybe something like https://dlang.org/phobos/ 
https://dlang.org/phobos/ 





Based on documentation volatileLoad/volatileStore seems like the 
closest thing so I'll go with that for now. Thanks.
Aug 13 2017