c++.dos.32-bits - Re: REP MOVSD
- Nic Tiger (26/26) Jun 21 2002 I recently encountered interesting thing (when I was compiling with DMC ...
- Roland (5/31) Jun 21 2002 interesting
- Javier Gutiérrez (18/56) Jun 24 2002 Generally for 486 and later the RISC form is faster.
- Roland (3/12) Jun 25 2002 oops ! I'm going to fire me
- Nic Tiger (7/33) Jun 22 2002 Also I ran into the same problem with CMPSD (while trying compile DOSX
I recently encountered interesting thing (when I was compiling with DMC 8.28 my code with inline asm): rep movsd instruction is reported to have 2 arguments ******* rep movsd ^ rep.cpp(5) : Error: 2 operands expected for the movsd instruction, had 0 ******* When I turned to Intel's spec, I've found out that THERE ARE 2 absolutely equal mnemonics for 2 absolutely different opcodes: MOVSD - move dword from DS:ESI to ES:EDI (string operation) MOVSD - move scalar double-precision floating-point value (SIMD) So, since DMC 8.28 has support for SIMD instructions, the second case takes place in DMC. I've found that replacing old REP MOVSD to REP MOVS dword ptr ds:[esi], dword ptr es:[edi] fixes problem, because according to Intel's spec they are equivalent, but the latter is explicit form. I hope this will be helpful for someone who encountered the same problem. Nic Tiger. P.S. Interesting enough, but when using MOVSD without REP prefix compiler chooses MOVSD version correctly. May be it is a compiler's bug and in case of REP it should do the same.
Jun 21 2002
interesting is rep movs still a little slower than mov eax,[esi]; add esi,1; mov es:[edi],eax; add edi,1; .. as it was in the 486 ? roland Nic Tiger a écrit :I recently encountered interesting thing (when I was compiling with DMC 8.28 my code with inline asm): rep movsd instruction is reported to have 2 arguments ******* rep movsd ^ rep.cpp(5) : Error: 2 operands expected for the movsd instruction, had 0 ******* When I turned to Intel's spec, I've found out that THERE ARE 2 absolutely equal mnemonics for 2 absolutely different opcodes: MOVSD - move dword from DS:ESI to ES:EDI (string operation) MOVSD - move scalar double-precision floating-point value (SIMD) So, since DMC 8.28 has support for SIMD instructions, the second case takes place in DMC. I've found that replacing old REP MOVSD to REP MOVS dword ptr ds:[esi], dword ptr es:[edi] fixes problem, because according to Intel's spec they are equivalent, but the latter is explicit form. I hope this will be helpful for someone who encountered the same problem. Nic Tiger. P.S. Interesting enough, but when using MOVSD without REP prefix compiler chooses MOVSD version correctly. May be it is a compiler's bug and in case of REP it should do the same.
Jun 21 2002
Generally for 486 and later the RISC form is faster. Going further, using the FPU registers or MMX instructitions if available is even faster, because you can move 64 and 128 bit at a time. BTW your sample source was wrong, since esi and edi should be incremented 4 times being: mov eax, [esi] add esi, 4 mov es:[edi], eax add edi, 4 "Roland" <rv ronetech.com> escribió en el mensaje news:3D12F02F.7066284F ronetech.com...interesting is rep movs still a little slower than mov eax,[esi]; add esi,1; mov es:[edi],eax; add edi,1; .. as it was in the 486 ? roland Nic Tiger a écrit :8.28I recently encountered interesting thing (when I was compiling with DMCabsolutelymy code with inline asm): rep movsd instruction is reported to have 2 arguments ******* rep movsd ^ rep.cpp(5) : Error: 2 operands expected for the movsd instruction, had 0 ******* When I turned to Intel's spec, I've found out that THERE ARE 2takesequal mnemonics for 2 absolutely different opcodes: MOVSD - move dword from DS:ESI to ES:EDI (string operation) MOVSD - move scalar double-precision floating-point value (SIMD) So, since DMC 8.28 has support for SIMD instructions, the second casebutplace in DMC. I've found that replacing old REP MOVSD to REP MOVS dword ptr ds:[esi], dword ptr es:[edi] fixes problem, because according to Intel's spec they are equivalent,problem.the latter is explicit form. I hope this will be helpful for someone who encountered the samecompilerNic Tiger. P.S. Interesting enough, but when using MOVSD without REP prefixcasechooses MOVSD version correctly. May be it is a compiler's bug and inof REP it should do the same.
Jun 24 2002
"Javier Gutiérrez" a écrit :Generally for 486 and later the RISC form is faster. Going further, using the FPU registers or MMX instructitions if available is even faster, because you can move 64 and 128 bit at a time. BTW your sample source was wrong, since esi and edi should be incremented 4 times being: mov eax, [esi] add esi, 4 mov es:[edi], eax add edi, 4oops ! I'm going to fire me roland
Jun 25 2002
Also I ran into the same problem with CMPSD (while trying compile DOSX runtime library). Nic Tiger. "Nic Tiger" <nictiger pt.comcor.ru> wrote in message news:aeukk3$11ua$1 digitaldaemon.com...I recently encountered interesting thing (when I was compiling with DMC8.28my code with inline asm): rep movsd instruction is reported to have 2 arguments ******* rep movsd ^ rep.cpp(5) : Error: 2 operands expected for the movsd instruction, had 0 ******* When I turned to Intel's spec, I've found out that THERE ARE 2 absolutely equal mnemonics for 2 absolutely different opcodes: MOVSD - move dword from DS:ESI to ES:EDI (string operation) MOVSD - move scalar double-precision floating-point value (SIMD) So, since DMC 8.28 has support for SIMD instructions, the second casetakesplace in DMC. I've found that replacing old REP MOVSD to REP MOVS dword ptr ds:[esi], dword ptr es:[edi] fixes problem, because according to Intel's spec they are equivalent, but the latter is explicit form. I hope this will be helpful for someone who encountered the same problem. Nic Tiger. P.S. Interesting enough, but when using MOVSD without REP prefix compiler chooses MOVSD version correctly. May be it is a compiler's bug and in case of REP it should do the same.
Jun 22 2002