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D.gnu - error: matching constraint references invalid operand number

reply rempas <rempas tutanota.com> writes:
Hello! After I've been convinced on using, GDC as my go to 
compiler when I need optimization (or other than x86_x64 targets) 
thanks to the replays of my previous posts, I now try to compiler 
my project using GDC but I'm having an error. I'm trying to use 
inline assembly (GCC syntax) but it won't compile (compiled 
without any problems with LDC). The inline assembly block 
specifically is part of the following function:

```d
i32 sys_clock_nanosleep(clock_id clock, i32 flags, timespec* req, 
timespec* rem) {
   i32 ret_code;

   asm {
     "syscall"
     : "=a" (ret_code)
     : "a" (230), "D" (clock), "S" (flags), "d" (req), "r10" (rem)
     : "memory", "rcx", "r11";
   }

   return ret_code;
}
```

When I try to compile, I'm getting the following error message:

```
source/time.d: In function ‘sys_clock_nanosleep’:
source/time.d:132:31: error: matching constraint references 
invalid operand number
   132 |       : "memory", "rcx", "r11";
```

Any ideas?
Mar 04 2022
parent reply Iain Buclaw <ibuclaw gdcproject.org> writes:
On Friday, 4 March 2022 at 17:18:56 UTC, rempas wrote:

 When I try to compile, I'm getting the following error message:

 ```
 source/time.d: In function ‘sys_clock_nanosleep’:
 source/time.d:132:31: error: matching constraint references 
 invalid operand number
   132 |       : "memory", "rcx", "r11";
 ```

 Any ideas?


GCC doesn't have constraints for registers %r8 .. %15.  As D 
doesn't have register variables either, you'll have to set-up r10 
in the instruction string.
```
asm {
   "mov %[rem], %%r10; syscall"
   : "=a" (ret_code)
   : "a" (230), "D" (clock), "S" (flags), "d" (req), [rem] "r" 
(rem)
   : "memory", "rcx", "r10", "r11";
}
```
Mar 04 2022
parent reply rempas <rempas tutanota.com> writes:
On Friday, 4 March 2022 at 23:33:12 UTC, Iain Buclaw wrote:

 GCC doesn't have constraints for registers %r8 .. %15.  As D 
 doesn't have register variables either, you'll have to set-up 
 r10 in the instruction string.
 ```
 asm {
   "mov %[rem], %%r10; syscall"
   : "=a" (ret_code)
   : "a" (230), "D" (clock), "S" (flags), "d" (req), [rem] "r" 
 (rem)
   : "memory", "rcx", "r10", "r11";
 }
 ```


Thank you! This will do the trick! Do you happen to know if D 
plans to add "registers" in the future or if it has been 
suggested but was rejected?

Also, how can I see the D specific options for GDC? Thinks like 
how to set "versions", options like the "-fno-druntime" and other 
specific D stuff as I'll I'm seeing in the "--help" message are 
options that are general and the output is in general the same as 
GCC.
Mar 05 2022
parent reply Iain Buclaw <ibuclaw gdcproject.org> writes:
On Saturday, 5 March 2022 at 10:04:43 UTC, rempas wrote:

 Thank you! This will do the trick! Do you happen to know if D 
 plans to add "registers" in the future or if it has been 
 suggested but was rejected?


core.attribute (or more specifically, gcc.attributes, which is 
where all the documented ones are) is the current place where 
"extensions" are thrown.  Maybe ` register("abc")` could be a 
further addition if the need is great enough.


 Also, how can I see the D specific options for GDC? Thinks like 
 how to set "versions", options like the "-fno-druntime" and 
 other specific D stuff as I'll I'm seeing in the "--help" 
 message are options that are general and the output is in 
 general the same as GCC.


With the option "--help=d"
Mar 05 2022
parent rempas <rempas tutanota.com> writes:
On Saturday, 5 March 2022 at 17:31:17 UTC, Iain Buclaw wrote:

 With the option "--help=d"


Alright! This will do the trick! Thanks a lot for your time and 
thanks a lot for your amazing work in GDC in general!
Mar 05 2022